rus
Issue #2/2025
R. Alekseev, V. Maltsev
SIMULATION OF Si–SiO2 INTERFACE DEPASSIVATION IN LDMOS TRANSISTOR STRUCTURE USING SENTAURUS TCAD
SIMULATION OF Si–SiO2 INTERFACE DEPASSIVATION IN LDMOS TRANSISTOR STRUCTURE USING SENTAURUS TCAD
DOI: 10.22184/1992-4178.2025.243.2.116.120
The article discusses methods for predicting the degradation processes of LDMOS transistors during operation under various temperature conditions. Simulation of an LDMOS transistor
in Sentaurus TCAD showed that changing temperature conditions leads to different rates of degradation of transistor characteristics, such as threshold voltage and leakage current.
Tags: degradation process depassivation ldmos transistor ldmos-транзистор reliability prediction si–sio2 interface граница раздела si–sio2 депассивация прогнозирование надежности процесс деградации
Subscribe to the journal Electronics: STB to read the full article.
The article discusses methods for predicting the degradation processes of LDMOS transistors during operation under various temperature conditions. Simulation of an LDMOS transistor
in Sentaurus TCAD showed that changing temperature conditions leads to different rates of degradation of transistor characteristics, such as threshold voltage and leakage current.
Tags: degradation process depassivation ldmos transistor ldmos-транзистор reliability prediction si–sio2 interface граница раздела si–sio2 депассивация прогнозирование надежности процесс деградации
Subscribe to the journal Electronics: STB to read the full article.
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