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DOI: 10.22184/1992-4178.2025.251.9.98.102
The article presents an overview of methods for optimizing the oxide layer etching process during the Through-Silicon-Via (TSV) formation. It further analyzes their impact on the quality
and reliability of 3D integrated circuits.
Tags: etch rate insulating oxide layer passivation film through-silicon-via
Subscribe to the journal Electronics: STB to read the full article.
The article presents an overview of methods for optimizing the oxide layer etching process during the Through-Silicon-Via (TSV) formation. It further analyzes their impact on the quality
and reliability of 3D integrated circuits.
Tags: etch rate insulating oxide layer passivation film through-silicon-via
Subscribe to the journal Electronics: STB to read the full article.
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